 /** \file btPwm.c
  **
  ** base time for PWM output file
  **
  ** History:
  **   - Thursday, November 07, 2013  1.0  Mark  First Version
  *************************************************************************/


 /*****************************************************************************/
 /* Include files                                                             */
 /*****************************************************************************/

 #include "btPwm.h"

 /*****************************************************************************/
 /* Local pre-processor symbols/macros ('#define')                            */
 /*****************************************************************************/

 /*****************************************************************************/
 /* Global variable definitions (declared in header file with 'extern')       */
 /*****************************************************************************/

 /*****************************************************************************/
 /* Local type definitions ('typedef')                                        */
 /*****************************************************************************/

 /*****************************************************************************/
 /* Local variable definitions ('static')                                     */
 /*****************************************************************************/
static FM3_BT_PWM_TypeDef*  BtPwm_Base[8] = {
                    FM3_BT0_PWM,
                    FM3_BT1_PWM,
                    FM3_BT2_PWM,
                    FM3_BT3_PWM,
                    FM3_BT4_PWM,
                    FM3_BT5_PWM,
                    FM3_BT6_PWM,
                    FM3_BT7_PWM};

boolean_t PWM_Init()
{
  btPwm_Init(0, 6500, 50);
  btPwm_Init(1, 6500, 50);
  btPwm_Init(2, 6500, 50);
  btPwm_Init(3, 6500, 50);
  btPwm_Init(4, 6500, 50);
  btPwm_Init(5, 6500, 50);
  btPwm_Init(6, 6500, 50);
  btPwm_Init(7, 6500, 50);
  return TRUE;
}

/*****************************************************************************
 *  DESCRIPTION:    Base timer PWM mode initialize
 *
 *  PARAMETERS:     base timer channel, cycle(uS, 1--6500), duty(%,0--100)
 *
 *  RETURNS:        true for success, false for failed
 *****************************************************************************/
boolean_t btPwm_Init(uint8_t u8Pwm, uint16_t cycle, uint8_t duty)
{
    if(cycle>6553 || duty>100)
        return FALSE;
    switch(u8Pwm){
    case 0:
        bFM3_GPIO_PFR3_PA = 1;  //P3A
        //FM3_GPIO->EPFR04 = FM3_GPIO->EPFR04 & ~(3<<8) | (2<<8); // TIOA0_1
        bFM3_GPIO_EPFR04_TIOA0E0 = 0;
        bFM3_GPIO_EPFR04_TIOA0E1 = 1;
        FM3_BTIOSEL03->BTSEL0123 &= 0xF0;  // SEL01_0,1,2,3 = 0000b, I/O mode 0
        break;
    case 1:
        bFM3_GPIO_PFR3_PB = 1;  //P3B
        bFM3_GPIO_EPFR04_TIOA1E0 = 0;
        bFM3_GPIO_EPFR04_TIOA1E1 = 1; // TIOA1_1
        FM3_BTIOSEL03->BTSEL0123 &= 0xF0;  // SEL01_0,1,2,3 = 0000b, I/O mode 0
        break;
    case 2:
        bFM3_GPIO_PFR3_PC = 1;  //P3C
        bFM3_GPIO_EPFR04_TIOA2E0 = 0;
        bFM3_GPIO_EPFR04_TIOA2E1 = 1; // TIOA2_1
        FM3_BTIOSEL03->BTSEL0123 &= 0x0F;  // SEL23_0,1,2,3 = 0000b, I/O mode 0
        break;
    case 3:
        bFM3_GPIO_PFR3_PD = 1;  //P3D
        bFM3_GPIO_EPFR04_TIOA3E0 = 0;
        bFM3_GPIO_EPFR04_TIOA3E1 = 1; // TIOA3_1
        FM3_BTIOSEL03->BTSEL0123 &= 0x0F;  // SEL23_0,1,2,3 = 0000b, I/O mode 0
        break;
    case 4:
        bFM3_GPIO_PFR3_PE = 1;  //P3E
        bFM3_GPIO_EPFR05_TIOA4E0 = 0;
        bFM3_GPIO_EPFR05_TIOA4E1 = 1; // TIOA4_1
        FM3_BTIOSEL47->BTSEL4567 &= 0xF0;  // SEL45_0,1,2,3 = 0000b, I/O mode 0
        break;
    case 5:
        bFM3_GPIO_PFR3_PF = 1;  //P3F
        bFM3_GPIO_EPFR05_TIOA5E0 = 0;
        bFM3_GPIO_EPFR05_TIOA5E1 = 1; // TIOA5_1
        FM3_BTIOSEL47->BTSEL4567 &= 0xF0;  // SEL45_0,1,2,3 = 0000b, I/O mode 0
        break;
    case 6:
        bFM3_GPIO_PFR0_PC = 1;  //P0C
        bFM3_GPIO_EPFR05_TIOA6E0 = 0;
        bFM3_GPIO_EPFR05_TIOA6E1 = 1; // TIOA6_1
        FM3_BTIOSEL47->BTSEL4567 &= 0x0F;  // SEL67_0,1,2,3 = 0000b, I/O mode 0
        break;
    case 7:
        bFM3_GPIO_PFR2_P3 = 1;  //P23
        bFM3_GPIO_EPFR05_TIOA7E0 = 0;
        bFM3_GPIO_EPFR05_TIOA7E1 = 1; // TIOA7_1
        FM3_BTIOSEL47->BTSEL4567 &= 0x0F;  // SEL67_0,1,2,3 = 0000b, I/O mode 0
        break;
    default:
        return FALSE;
    }
    //==========================================================
    BtPwm_Base[u8Pwm]->TMCR = 0x1012;
    BtPwm_Base[u8Pwm]->TMCR2 = 0;
    BtPwm_Base[u8Pwm]->STC = 0;
    BtPwm_Base[u8Pwm]->PCSR = (uint16_t)PWM_CYCLE(cycle);
    BtPwm_Base[u8Pwm]->PDUT = (uint16_t)(PWM_CYCLE(cycle)*duty/100);
    return TRUE;
}

void btPwm_Deinit(uint8_t u8Pwm)
{
	switch(u8Pwm){
	case 0:
		bFM3_GPIO_PFR3_PA = 0;  //P3A
        bFM3_GPIO_EPFR04_TIOA0E0 = 0;
        bFM3_GPIO_EPFR04_TIOA0E1 = 0;
		break;
	case 1:
		bFM3_GPIO_PFR3_PB = 0;  //P3B
        bFM3_GPIO_EPFR04_TIOA1E0 = 0;
        bFM3_GPIO_EPFR04_TIOA1E1 = 0; // TIOA1_1
		break;
	case 2:
		bFM3_GPIO_PFR3_PC = 0;  //P3C
        bFM3_GPIO_EPFR04_TIOA2E0 = 0;
        bFM3_GPIO_EPFR04_TIOA2E1 = 0; // TIOA2_1
		break;
	case 3:
		bFM3_GPIO_PFR3_PD = 0;  //P3D
        bFM3_GPIO_EPFR04_TIOA3E0 = 0;
        bFM3_GPIO_EPFR04_TIOA3E1 = 0; // TIOA3_1
		break;
	case 4:
        bFM3_GPIO_PFR3_PE = 0;  //P3E
        bFM3_GPIO_EPFR05_TIOA4E0 = 0;
        bFM3_GPIO_EPFR05_TIOA4E1 = 0; // TIOA4_1
		break;
	case 5:
        bFM3_GPIO_PFR3_PF = 0;  //P3F
        bFM3_GPIO_EPFR05_TIOA5E0 = 0;
        bFM3_GPIO_EPFR05_TIOA5E1 = 0; // TIOA5_1
		break;
	case 6:
        bFM3_GPIO_PFR0_PC = 0;  //P0C
        bFM3_GPIO_EPFR05_TIOA6E0 = 0;
        bFM3_GPIO_EPFR05_TIOA6E1 = 0; // TIOA6_1
        break;
    case 7:
        bFM3_GPIO_PFR2_P3 = 1;  //P23
        bFM3_GPIO_EPFR05_TIOA7E0 = 0;
        bFM3_GPIO_EPFR05_TIOA7E1 = 0; // TIOA7_1
        break;
	default:
		return;
	}
	BtPwm_Base[u8Pwm]->TMCR = 0;
    BtPwm_Base[u8Pwm]->TMCR2 = 0;
    BtPwm_Base[u8Pwm]->STC = 0;
    BtPwm_Base[u8Pwm]->PCSR = 0;
    BtPwm_Base[u8Pwm]->PDUT = 0;
}

void btPwmStart(uint8_t u8Pwm)
{
	BtPwm_Base[u8Pwm]->TMCR |= CTEN;
	BtPwm_Base[u8Pwm]->TMCR |= STRG;
}

void btPwmStop(uint8_t u8Pwm)
{
	BtPwm_Base[u8Pwm]->TMCR &= ~CTEN;
}

void PWMSet(uint8_t u8Pwm, uint16_t cycle, uint8_t duty)
{
  btPwm_Init(u8Pwm, cycle, duty);
}